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- Video 7 Super VGA.
- Now Headland Technologies
-
- Earlier V7/Headland boards use Chips&Technologies and Cirrus chips.
-
- Board: Chip:
- V7VRAM HT-208
- V71024i HT-208
- ? HT-216
-
-
-
-
-
- 100h (R/W?): Microchannel ID low
- bit 0-7 Card ID bit 0-7
-
- 101h (R/W?): Microchannel ID high
- bit 0-7 Card ID bit 8-15
-
- 102h (R/W): Alt Video Subsystem Enable
- bit 0 Enable Video if set
- Must be armed by 3C4h index 0FCh bit 7
- or in setup mode (46E8h bit4) to change.
-
- 3C2h (W): Misc Output register
- bit 5 Bit 1 of Bank no.
- Note: This register can be read at 3CCh.
-
- 3C3h (R/W): Video Subsystem Enable
- bit 0 Enable Microchannel Video if set
- Must be armed by 3C4h index 0FCh bit 7 to change.
-
- 3C4h index 6 (R/W): Extension Control
- bit 0 (Read Only) Extensions enabled if set
- bit 0-7 (Write Only) 0EAh Enables extensions, 0AEh disables.
-
- 3C4h index 7 (R/W): Reset Horizontal Character Counter
-
- 3C4h index 80h (R/W): Test
-
- 3C4h index 81h (R/W): Test
-
- 3C4h index 82h (R/W): Test
-
- 3C4h index 83h (R/W): Attribute Control Index
-
- 3C4h index 8Eh-8Fh (R): Chip Version
- bit 0-7 Chip version:
- 80h-FFh: VEGA VGA Chip,
- 70h: V7VGA chip revision 1,2 or 3
- 71h: V7VGA chip revision 4
- 50h-59h: V7VGA Version 5
- 41h-49h: 1024i.
-
- 3C4h index 94h (R/W): Pointer Pattern Address
- bit 0-7 Bit 6-13 of the start address of the Pointer Pattern
-
- 3C4h index 9Ch (R/W): Pointer Horizontal Position High
- bit 0-2 Bit 8-10 of the X coordinate of the Pointer
-
- 3C4h index 9Dh (R/W): Pointer Horizontal Position Low
- bit 0-7 Bit 0-7 of the X coordinate of the Pointer
-
- 3C4h index 9Eh (R/W): Pointer Vertical Position High
- bit 0-1 Bit 8-9 of the Y coordinate of the Pointer
-
- 3C4h index 9Fh (R/W): Pointer Vertical Position Low
- bit 0-7 Bit 0-7 of the Y coordinate of the Pointer
-
- 3C4h index A0h (R/W): GC Memory Latch 0
- bit 0-7 Plane 0 Memory Latch Data
-
- 3C4h index A1h (R/W): GC Memory Latch 1
- bit 0-7 Plane 1 Memory Latch Data
-
- 3C4h index A2h (R/W): GC Memory Latch 2
- bit 0-7 Plane 2 Memory Latch Data
-
- 3C4h index A3h (R/W): GC Memory Latch 3
- bit 0-7 Plane 3 Memory Latch Data
-
- 3C4h index A4h (R/W): Clock Select
- bit 2-4 0: 25.175 MHz
- 1: 28.322 MHz
- 2: 30.000 MHz
- 3: 32.514 MHz
- 4: 34.000 MHz
- 5: 36.000 MHz
- 6: 38.000 MHz
- 7: 40.000 MHz
-
- 3C4h index A5h (R/W): Cursor Attributes
- bit 0 Cursor blink enabled if clear
- 3 Text Cursor Mode is XOR if set, Replace if clear
- 7 Graphics Cursor Enabled if set
-
- 3C4h index B0h-BFh (R/W): Scratch Registers
- bit 0-7 Scratch
-
- 3C4h index E0h (R/W): Miscellaneous Control (Version 4+)
- bit 0-3 Reserved
- 4 Interlaced
- 5-6 Reserved
- 7 Enables Split Bank Mode
-
- 3C4h index E8h (R/W): Single/Write Bank Register (Version 4+)
- bit 4-7 Single/Write Bank no.
-
- 3C4h index E9h (R/W): Read Bank Register (Version 4+)
- bit 4-7 Read Bank no.
- Only Active if Split mode enabled (3C4h index E0h bit 7)
-
- 3C4h index EAh (W): Switch Strobe
- Note: A write to this register copies the switch positions to
- the Switch Readback Register (3C4h index F7h).
-
- 3C4h index EBh (R/W): Emulation Control
-
- 3C4h index ECh (R/W): Foreground Latch 0
- bit 0-7 Foreground Latch for plane 0. When in Dither Foreground mode
- (3C4h index FEh bit 2-3 = 2) the data in this register
- replaces the data written from the processor.
-
- 3C4h index EDh (R/W): Foreground Latch 1
- bit 0-7 Foreground Latch for plane 1.
-
- 3C4h index EEh (R/W): Foreground Latch 2
- bit 0-7 Foreground Latch for plane 2.
-
- 3C4h index EFh (R/W): Foreground Latch 3
- bit 0-7 Foreground Latch for plane 3.
-
- 3C4h index F0h (R/W): Fast Foreground Latch Load
- bit 0-7 The Foreground Latches (3C4h index ECh to EFh) for the four
- memory planes can be loaded by writing to this register.
- The writes will cycle through planes 0-3.
- A read will restart at plane 0.
-
- 3C4h index F1h (R/W): Fast Latch Load State
- bit 0-1 Background Latch Load State. Determines which of the
- four memory latches will be loaded by a write to 3C4h
- index F2h. Each write to index F2h will increment this
- value and each read from index F2h will reset it to 0.
- 2-3 Unused
- 4-5 Foreground Latch Load State. Determines which of the
- four Foreground latches (3C4h index ECh to EFh) will
- be loaded by the next write to 3C4h index F0h.
- Each write to index F0h will increment this value
- and each read from index F0h will reset it to 0.
- 6-7 Unused
-
- 3C4h index F2h (R/W): Fast Background Latch Load
- bit 0-7 The Memory Data Latches for the four memory planes can be
- loaded by writing to this register. The writes will cycle
- through planes 0-3. A read will restart at plane 0.
-
- 3C4h index F3h (R/W): Masked Write Control (Only with VRAM)
- bit 0 Enables Masked Writes if set
- 1 If set rotated CPU byte is used as WriteMask, else
- Masked Write Mask register is used.
-
- 3C4h index F4h (R/W): Masked Write Mask (Only with VRAM)
- bit 0-7 If Masked Writes enabled by 3C4h index F3h bit 0
- Only the bits set here will be updated in Video memory.
-
- 3C4h index F5h (R/W): Foreground/Background Pattern
- bit 0-7
-
- 3C4h index F6h (R/W): 1MB RAM Bank Select
- bit 0-1 Write Bank no bit 2-3 if 256 color, bit 0-1 else.
- 2-3 Read Bank no bit 2-3 if 256 color, bit 0-1 else.
- 4-5 CRTC Bank (Address bit 16-17)
- 6 Display address Wraps Around at bank boundary if set
- 7 Split Screen Wraps around at bank boundary if set
-
- 3C4h index F7h (R/W): Switch Readback
- bit 0-7 Switch positions as read by the last write to the Switch
- Strobe Register (3C4h index EAh)
-
- 3C4h index F8h (R/W): Extended Clock Control
- bit 5-7 Clock Source:
- 0: 25.175 MHz
- 1: 28.322 MHz
- 2: 30.000 MHz
- 3: 32.514 MHz
- 4: 34.000 MHz
- 5: 36.000 MHz
- 6: 38.000 MHz
- 7: 40.000 MHz
- Note: depending on mode and other bits in this register other
- values may be selected.
-
- 3C4h index F9h (R/W): Page Select
- bit 0 bit 16 of Video Memory Address. (Only needed if in a
- 256 color mode, and 3C4h index FCh bit 1-2 = 1).
-
- 3C4h index FAh (R/W): Extended Foreground Color
- bit 0-3 Foreground expansion color.
- Bit 0 is written to plane 0 et cetera.
-
- 3C4h index FBh (R/W): Extended Background Color
- bit 0-3 Background expansion color
- Bit 0 is written to plane 0 et cetera.
-
- 3C4h index FCh (R/W): Compatibility Control
- bit 0 Enable Extended Attribute functions if set
- Extended attributes allows underlining using a mask
- in plane 3 for each character.
- 1 256-Color Paging Enabled if set.
- 2 256-Color 64K/128K paging Select.
- 128K pages if set, 64K pages else.
- 3-6 Reserved.
- 7 If set allows enabling VGA via 102h bit 0 or 3C3h bit 0.
-
- 3C4h index FDh (R/W): Extended Timing Select
-
- 3C4h index FEh (R/W): Foreground/Background Control
- bit 0 Unused
- 1 Foreground/background source select
- Source is CPU data if set, 3C4h index F5h else.
- 2-3 Foreground/background mode select
- 0 Standard VGA mode
- 1 Color Expansion Mode
- A monochrome bitmap is expanded to color.
- For each bit of of data written from the processor
- a zero bit causes the background color (3C4h index FBh)
- to be written in the corresponding pixel, and a 1 bit
- causes the foreground color (3C4h index FAh) to be written.
- 2 Dithered foreground. The data from the processor is
- replaced by data from four Foreground Latches (3C4h index
- ECh to EFh). The normal VGA Read Latches function as normal.
- 3 Invalid
- 4-7 Unused
-
- 3C4h index FFh (R/W): 16 bit Interface Control
- bit 0 16 bit memory if set
- 1 16 bit I/O if set
- 2 Fast Write Enabled if set
- 3 16 bit ROM access if set
- 4 Enable bank selection
- 5-6 Cursor Pattern Page Select
- 7 (Read only) Card in 8 or 16 bit slot
-
- 3d4h index 1Fh (R): Identification register
- bit 0-7 Returns bit 0-7 of the Start Address High Register
- (3d4h index 0Ch) xored with 0EAh.
-
- 3d4h index 22h (R): Graphics Controller Data Latch
- bit 0-7 Data from one of 4 bit-planes selected through the
- RMS field of the Read Map Select Register (3CEh index 4)
-
- 3d4h index 24h (R): Graphics Controller Data
- bit 0-4 Attribute Index. Same as 3C1 bit 0-4.
- 5 Palette source. Same as 3C1h bit 5
- 7 Does the Attribute Controller point to Index or Data .
-
- 3d4h index 30h-3Fh (W): Clear Vertical Display
- bit 0 if set speeds up video memory access by increasing the
- vertical Retrace Period.
-
-
- 46E8h (W): Rom Map & Video Subsystem
- bit 0-2 Enable VGA PC/AT
- 3 Enable VGA PC/AT if set
- 4 Enter VGA Setup Mode if set
- In Setup Mode only registers 102h, 3C3h and 46E8h
- are active.
-
-
- 4BC4h,4BC5 used.
-
-
- Bank Select:
-
- Two methods exists:
-
- All models can use method 1:
- For 2 and 4 color modes bit 16 of the address is in 3C2h bit 5.
-
- For 16 color modes separate read and write banks can be selected
- through 3C4h index F6h.
-
- For 256 color modes the bank fields in 3C4h index F6h select
- bit 18&19 of the video memory address.
- Bit 16 is selected through 3C4h index F9h bit 0.
- Bit 17 is selected through Miscellaneous Output Register
- (3C2h/3CCh bit 5).
- Bit 16&17 are shared by read and write operations.
-
- For Version 5 and above separate bank registers are available.
- Both read and write banks exists.
-
-
- ID Video 7 VGA Chip Set:
-
- vio($6F00);
- if rp.bx=$5637 then
- begin
- vio($6F07);
- case rp.bl of
- $80..$FF: VEGA_VGA;
- $70..$7F:V7VGA_FASTWRITE/VRAM; {Revision 3}
- $50..$59:V7VGA_Version5;
- $41..$49:Video7_1024i;
- end;
- end;
-
-
- Video Modes:
- 40h T 80 43 2
- 41h T 132 25 2
- 42h T 132 43 2
- 43h T 80 60 16
- 44h T 100 60 16
- 45h T 132 28 16
-
- 60h G 752 410 16 planar
- 61h G 720 540 16 planar
- 62h G 800 600 16 planar
- 63h G 1024 768 2 planar
- 64h G 1024 768 4 planar odd/even
- 65h G 1024 768 16 planar
- 66h G 640 400 256 packed V1024 w/VRAM
- 67h G 640 480 256 packed
- 68h G 720 540 256 packed VRAM only
- 69h G 800 600 256 packed VRAM only
- 6Ah G 1024 768 256 packed
-
-
- BIOS extensions:
-
- ----------106F00-----------------------------
- INT 10 - VIDEO - INSTALLATION CHECK (Video7 VGA,VEGA VGA)
- AX = 6F00h
- Return: BX = 5637h ('V7') indicates Video7 VGA/VEGA VGA extensions are present
- ----------106F01-----------------------------
- INT 10 - VIDEO - GET MONITOR INFO (Video7 VGA,VEGA VGA)
- AX = 6F01h
- Return: AL = monitor type code (VEGA VGA only)
- AH = status register information
- bit 0 = display enable
- 0 = display enabled
- 1 = vertical or horizontal retrace in progress
- bit 1 = light pen flip flop set
- bit 2 = light pen switch activated
- bit 3 = vertical retrace if set
- bit 4 = monitor resolution
- 0 = high resolution (>200 lines)
- 1 = low resolution (<=200 lines)
- bit 5 = display type
- 0 = color
- 1 = monochrome
- bits6,7= diagnostic bits
- Note: bits 0-3 are the same as the EGA/VGA status register bits 0-3
- ----------106F04-----------------------------
- INT 10 - VIDEO - GET MODE AND SCREEN RESOLUTION (Video7 VGA, VEGA VGA)
- AX = 6F04h
- Return: AL = current video mode (see AX=6F05h)
- BX = horizontal columns (text) or pixels (graphics)
- CX = vertical columns (text) or pixels (graphics)
- SeeAlso: AX=6F05h
- ----------106F05-----------------------------
- INT 10 - VIDEO - SET VIDEO MODE (Video7 VGA, VEGA EXTENDED EGA/VGA)
- AX = 6F05h
- BL = mode (see below)
- SeeAlso: AH=00h,AX=0070h
-
- Values for video mode:
- 00h-13h = standard IBM modes (see AH=00h)
- 40h-6Ah = see table above.
-
- SeeAlso: AH=00h,AX=0070h,AX=007Eh,AX=6F04h
- ----------106F06-----------------------------
- INT 10 - VIDEO - SELECT AUTOSWITCH MODE (V7VGA,VEGA VGA)
- AX = 6F06h
- BL = Autoswitch mode select
- 00h select EGA/VGA-only modes
- 01h select Autoswitched VGA/EGA/CGA/MGA modes
- 02h select 'bootup' CGA/MGA modes
- BH = enable/disable (00h enable, 01h = disable selection)
- ----------106F07-----------------------------
- INT 10 - VIDEO - GET VIDEO MEMORY CONFIGURATION (V7VGA,VEGA VGA)
- AX = 6F07h
- Return: AL = 6Fh
- AH = bits 0-6 = number of 256K blocks of video memory
- bit 7 = DRAM/VRAM (0: DRAM, 1: VRAM)
- BH = chip revision (SR8F) (S/C Chip in VEGA VGA)
- BL = chip revision (SR8E) (G/A Chip in VEGA VGA)
- CX = 0000h
- SeeAlso: AH=12h/BL=10h
-